This invention relates to circuitry for application-specific integrated circuits (“ASICs”) that can be used as equivalents of or substitutes for programmable logic circuitry (PLDs or FPGAs). The invention also relates to transferring designs for particular uses of an ASIC or a PLD (or FPGA) between those two types of devices so that device interchangeability is achieved.
A typical programmable logic device (“PLD”) or field-programmable gate array (“FPGA”) includes many logic elements (“LEs”) of a fixed size. (For convenience herein, the term FPGA is used as a generic term for PLDs and FPGAs.) For example, an FPGA LE may include a four-input look-up table (“LUT”), a register, and some routing circuitry that allows the register to be either used (e.g., to register the output of the LUT) if sequential logic or operation, is desired, or to be bypassed by the LUT output if only combinational or combinatorial logic or operation is desired. An FPGA LE may also have other features or capabilities, but the foregoing example will be sufficiently illustrative. In addition to many LEs, an FPGA also typically has programmable routing circuitry for conveying signals to, from, and/or between the LEs in any of many different ways so that very complex and/or extensive logic or logic-type operations can be performed by combining or otherwise using multiple LEs. Also in addition to LEs, an FPGA may have other types of circuitry, such as input/output (“I/O”) circuitry, blocks of memory, microprocessors, special-purpose circuitry such as digital signal processing (“DSP”) blocks, high-speed serial interface (“HSSI”) blocks, etc. These other types of circuitry may also be interconnectable to one another (and to the LEs) via the above-mentioned programmable routing circuitry.
FPGAs have many advantages that are well known to those skilled in the art. In some instances, however, it may be desired to have an ASIC equivalent of an FPGA design so that cost can be reduced in a high-volume application. For example, a design may start out in an FPGA. But after that design has been sufficiently proven and has reached sufficiently high volume, substituting an ASIC equivalent can be very cost-effective.
One known approach to providing ASIC equivalents to FPGAs employs an ASIC architecture having the same basic organization of LEs as the starting FPGA. For example, if the FPGA includes an array of LEs, each of which has a four-input LIFT (“4-LUT”) and a register, then the ASIC has a similar array of LEs including 4-LUTs and registers. Certain layers in the ASIC are then customized to a particular user's design to effectively “program” the LEs and to provide the required interconnection routing among the LEs.
The foregoing approach to providing ASIC equivalents of FPGAs has many advantages. However, improvements are always sought. For example, most user designs do not make use of all the circuitry on an FPGA. Some fraction of the FPGA circuitry is generally unused. A 4-LUT may only be used to provide a two- or three-input function. Or either the LUTs or the registers (but not both) in some LEs may be used. In any of these cases, substantial amounts of the circuitry in the less-than-fully-utilized LEs is effectively wasted. If the same basic LE structure forms the basis for the equivalent ASIC, the same waste will be replicated in the ASIC.